in1, in2 no4 com2 no2 nc3 in3, in4 nc1 com4 1 2 3 12 11 10 49 56 8 16 15 14 13 nc2 gnd no3 com3 com1 no1 v+ nc4 top view qfn-16 (4 x 4) 7 DG2017 vishay siliconix new product document number: 72228 s-31067?rev. a, 26-may-03 www.vishay.com 1 low-voltage, low r on , dual dpdt analog switch features low voltage operation (2.0 v to 5.5 v) low on-resistance @ 2.7 v - r on: sw 1, sw 2 - 3.2 sw 3, sw 4 - 0.64 fast switching: t on = 46 ns t off = 21 ns qfn-16 (4x4 mm) package benefits space saving solution low power consumption guaranteed low voltage operation low voltage logic compatible applications cellular phones integrated speaker switching audio and video signal routing pcmcia cards battery operated systems description the DG2017 is a dual dpdt (double-pole/double-throw), optimized for high performance analog switching, and specifically designed to benefit portable audio applications. one pair of double-throw switches is sub 1 for low impedance speaker performance while the second pair of double-throw switches is suitable for microphone applications. with the dpdt configuration, the DG2017 provides the flexibility for stereo-single-end or differential btl output structures with a fully integrated differential microphone switching solution. the DG2017 is an integrated monolithic device in a qfn-16 (4 x 4 mm) package that provides a space saving solution over the use of multiple single spdt devices as well as providing the advantage of on-resistance flatness and matching that single spdt devices cannot offer. the DG2017 provides low charge injection (2 pc), fast switching time ( ton and t off less than 100 ns), excellent off-isolation and crosstalk (?70 db @ 100 khz). during operation, continuous current through any or all switches is rated at 200 ma, ideal for portable audio applications. built on vishay siliconix?s low voltage cmos process, the DG2017 contains an epitaxial layer that prevents latchup. break-before-make is guaranteed. when on, each switch conducts equally well in both directions, and block up to the power supply level when off. functional block diagram and pin configuration truth table logic nc1, 2, 3 and 4 no1, 2, 3 and 4 0 on off 1 off on ordering information temp range package part number -40 to 85 c 16-pin qfn (4 x 4 mm) DG2017dn
DG2017 vishay siliconix new product www.vishay.com 2 document number: 72228 s-31067?rev. a, 26-may-03 absolute maximum ratings reference to gnd v+ -0.3 to +6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . in, com, nc, no a -0.3 to (v+ + 0.3 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . current (any terminal except no, nc or com) 30 ma . . . . . . . . . . . . . . . . . . continuous current (no, nc, or com) 200 ma . . . . . . . . . . . . . . . . . . . . . peak current 300 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (pulsed at 1 ms, 10% duty cycle) storage temperature (d suffix) -65 to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . package solder reflow conditions d 16-pin qfn (4 x 4 mm) 240 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation (packages) b qfn-16 (4x4 mm) 1880 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inter- nal diodes. limit forward diode current to maximum current ratings. b. all leads welded or soldered to pc board. c. derate 23.5 mw/ c above 70 c d. manual soldering with iron is not recommended for leadless components. the qfn is a leadless package. the end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufactur- ing. a solder fillet at the exposed copper lip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. specifications (v+ = 3 v) test conditions otherwise unless specified limits - 40 to 85 c parameter symbol v+ = 3 v, 10%, v in = 0.4 or 1.6 v e temp a min b typ c max b unit analog switch analog signal range d v no , v nc , v com full 0 v+ v dc characteristics on resistance r on (sw 1, sw 2 ) v+ = 2.7 v, v com = 0.2 v/1.5 v, i no , i nc = 10 ma room full 3.2 3.7 4.3 on-resistance r on (sw 3, sw4) v+ = 2.7 v, v com = 0.2 v/1.5 v, i no , i nc = 100 ma room full 0.67 1.1 1.2 r on flatness d r on (sw 1, sw 2 ) v+ = 2.7 v, v com = 0.2 v/1.5 v, i no , i nc = 10 ma room full 1.4 2.0 r on flatness d r on (sw3 , sw 4 ) v+ = 2.7 v, v com = 0.2 v/1.5 v, i no , i nc = 100 ma room full 0.12 0.3 r on match d r on (sw 1, sw 2 ) v+ = 2.7 v, v com = 0.2 v/1.5 v, i no , i nc = 10 ma room full 0.3 r on match d r on (sw 3, sw 4 ) v+ = 2.7 v, v com = 0.2 v/1.5 v, i no , i nc = 100 ma room full 0.3 switch off leakage current i no(off) , i nc(off) v+ = 3.3 v, v n o , v n c = 0.3 v/3.0 v room full - 0.5 5.0 0.5 5.0 switch off leakage current i com(off) v+ = 3 . 3 v , v no , v nc = 0 . 3 v/3 . 0 v v com = 0.3 v/3.0 v room full - 0.5 5.0 0.5 5.0 na channel-on leakage current i com(on) v+ = 3.3 v, v no =v nc v com =0.3 v/3.0 v room full - 0.5 5.0 0.5 5.0 digital control input high v oltage v inh full 1.6 v input low voltage v inl full 0.4 v input capacitance c in full 6 pf input current i inl or i inh v in = 0 or v+ full -1 1 a
DG2017 vishay siliconix new product document number: 72228 s-31067?rev. a, 26-may-03 www.vishay.com 3 specifications (v+ = 3 v) parameter limits - 40 to 85 c temp a test conditions otherwise unless specified symbol parameter unit max b typ c min b temp a v+ = 3 v, 10%, v in = 0.4 or 1.6 v e symbol dynamic characteristics turn on time t on, (sw 1, sw 2 ) room full 62 85 91 turn-on time t on, (sw 3, sw 4 ) room full 46 74 79 turn off time t on, (sw 1, sw 2 ) v n o or v n c = 2.0 v, r l = 300 , c l = 35 p f room full 12 35 36 ns turn-off time t on, (sw 3, sw 4 ) v no or v nc = 2 . 0 v , r l = 300 , c l = 35 pf (figure 1,2) room full 21 46 48 ns break before make time t d, (sw 1, sw 2 ) full 5 45 break-before-make time t d, (sw 3, sw 4 ) full 5 26 charge injection d q inj, (sw 1, sw 2 ) c l = 1 nf, v g en = 0 v, r g en = 0 room 2 pc charge injection d q inj, (sw 3, sw 4 ) c l = 1 nf , v gen = 0 v , r gen = 0 (figure 3) room 1 pc off isolation d oirr, (sw 1, sw 2 ) -68 off-isolation d oirr, (sw 3, sw 4 ) r l = 50 , c l = 5 p f, f = 1 mhz room -51 db crosstalk d x talk , (sw 1, sw 2 ) r l = 50 , c l = 5 pf , f = 1 mhz (figure 4) room -69 db crosstalk d x talk , (sw 3, sw 4 ) -51 n o n c off capacitance d c off, (sw 1, sw 2 ) 12 n o , n c off capacitance d c off,, (sw 3, sw 4 ) v in = 0 or v+ f = 1 mhz room 43 pf channel on capacitance d c on, (sw 1, sw 2 ) v in = 0 or v+, f = 1 mhz room 86 pf channel-on capacitance d c on, (sw 3, sw 4 ) 283 power supply power supply range v+ 2.0 5.5 v power supply current i+ v oe = 0 or v+ 1.0 a notes: a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. d. guarantee by design, nor subjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5-v leakage testing, not production tested.
DG2017 vishay siliconix new product www.vishay.com 4 document number: 72228 s-31067?rev. a, 26-may-03 typical characteristics (25 c unless noted) - 60 - 40 - 20 0 20 40 60 80 100 10 10 k 100 k 10 m 100 1 k 1 m 10 ma 1 ma 100 a 10 a 1 a 10 na 100 na supply current vs. input switching frequency in p ut switchin g fre q uenc y ( hz ) i+ - supply current (a) 0.00 1.00 2.00 3.00 4.00 5.00 6.00 012345 r on vs. v com and single supply v oltage v com - analog voltage (v) - on-resistance ( r on ) 0.000 0.200 0.400 0.600 0.800 1.000 1.200 1.400 1.600 012345 r on vs. v com and single supply v oltage v com - analog voltage (v) - on-resistance ( r on ) 10 10000 supply current vs. temperature tem p erature ( c ) 100 1000 i+ - supply current (na) v+ = 3 v t = 25 c sw 1 & sw 2 i s =10 ma v+ = 5.0 v v in = 0 v 100 na 1 na v+ = 5.0 v v+ = 3.3 v v+ = 2.7 v v+ = 2.3 v t = 25 c sw 3 & sw 4 v+ = 5.0 v, i s = 100 ma v+ = 3.3 v, i s = 100 ma v+ = 2.7 v, i s = 100 ma v+ = 2.3 v, i s = 50 ma 0.00 1.00 2.00 3.00 4.00 5.00 6.00 012345 v com - analog voltage (v) v+ = 5.0 v v+ = 2.7 v 0.000 0.200 0.400 0.600 0.800 1.000 1.200 1.400 012345 v com - analog voltage (v) sw 3 and sw 4 r on vs. analog voltage and t emperature r on vs. analog voltage and t emperature 85 c 25 c -40 c 85 c 25 c -40 c sw 1 and sw 2 v+ = 5.0 v 85 c 25 c -40 c v+ = 2.7 v 85 c 25 c -40 c v+ = 3.0 v v in = 0 v i s =10 ma i s =100 ma - on-resistance ( r on ) - on-resistance ( r on )
DG2017 vishay siliconix new product document number: 72228 s-31067?rev. a, 26-may-03 www.vishay.com 5 typical characteristics (25 c unless noted) - 800 - 600 - 400 - 200 0 200 400 600 800 0.0 0.5 1.0 1.5 2.0 2.5 3.0 leakage vs. analog voltage v com , v no , v nc - analog voltage (v) - 60 - 40 - 20 0 20 40 60 80 100 1 1000 leakage current vs. temperature temperature ( c) v+ = 5.0 v 10 100 leakage current (pa) leakage current (pa) v+ = 3 v i no(off) , i nc(off) i com(on) i com(off) 0 20 40 60 80 100 120 140 160 - 60 - 40 - 20 0 20 40 60 80 100 switching time vs. t emperature / t on - switching time ( t off s) t off v+ = 2 v temperature ( c) t on v+ = 2 v leakage current (pa) t on v+ = 3 v t on v+ = 5 v t off v+ = 3 v t off v+ = 5 v 0 20 40 60 80 100 - 60 - 40 - 20 0 20 40 60 80 100 switching time vs. t emperature / t on - switching time ( t off s) t on v+ = 2 v t on v+ = 3 v t off v+ = 5 v t off v+ = 3 v 100 k -90 10 m 10 -70 -50 100 m 1 m insertion loss, off-isolation crosstalk vs. frequency (db) loss, oirr, x talk -30 -10 loss oirr 1 g -80 -60 -40 -20 0 frequency (hz) DG2017 sw 1 and sw 2 v+ = 3 v r l = 50 100 k -90 10 m 10 -70 -50 100 m 1 m insertion loss, off-isolation crosstalk vs. frequency (db) loss, oirr, x talk -30 -10 loss oirr x talk 1 g -80 -60 -40 -20 0 frequency (hz) DG2017 sw 3 and sw 4 v+ =3 v r l = 50 i no(off) , ii nc(off) temperature ( c) i com(on) i com(off) x talk t off v+ = 2 v t on v+ = 5 v
figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50% 0 v logic input switch output t on t off logic ?1? = switch on logic input waveforms inverted for switches that have the opposite logic sense. 0 v switch output v out v com r l r l r on 0.9 x v out t r 5 ns t f 5 ns v inh v inl DG2017 vishay siliconix new product www.vishay.com 6 document number: 72228 s-31067?rev. a, 26-may-03 typical characteristics (25 c unless noted) -60 -40 -20 0 20 40 60 0.0 0.5 1.0 1.5 2.0 2.5 3.0 charge injection vs. analog voltage v com - analog voltage (v) q - charge injection (pc) switching threshold vs. supply v oltage v+ - supply voltage (v) - switching threshold (v) v t 0.0 0.5 1.0 1.5 2.0 2.5 3.0 01234567 sw 1 and sw 2 sw 3 and sw 4 v+ = 3 v test circuits
DG2017 vishay siliconix new product document number: 72228 s-31067?rev. a, 26-may-03 www.vishay.com 7 test circuits figure 4. off-isolation figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+ in gnd nc or no 0v, 2.4 v 10 nf com off isolation 20 log v com v no nc r l analyzer v+ v+ com figure 3. charge injection off on on in v out v out q = v out x c l c l = 1 nf r gen v out com v in = 0 - v+ in v gen gnd v+ v+ in depends on switch configuration: input polarity determined by sense of switch. + nc or no figure 2. break-before-make interval c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no t r <5 ns t f <5 ns 90% t d t d in com v+ gnd v+ c l 35 pf v o r l 300 v inl v inh
|
